30 #define SWITCHTEC_LIB_CORE 
   32 #include "switchtec_priv.h" 
   35 #include "switchtec/utils.h" 
   57 #define EV(t, n, s, d)[SWITCHTEC_ ## t ## _EVT_ ## n] = {\ 
   59     .summary_bit = (1 << (s)), \ 
   64 #define GLOBAL SWITCHTEC_EVT_GLOBAL 
   65 #define PART SWITCHTEC_EVT_PART 
   66 #define PFF SWITCHTEC_EVT_PFF 
   72     const char *short_name;
 
   75     EV(GLOBAL, STACK_ERROR, 0, 
"Stack Error"),
 
   76     EV(GLOBAL, PPU_ERROR, 1, 
"PPU Error"),
 
   77     EV(GLOBAL, ISP_ERROR, 2, 
"ISP Error"),
 
   78     EV(GLOBAL, SYS_RESET, 3, 
"System Reset"),
 
   79     EV(GLOBAL, FW_EXC, 4, 
"Firmware Exception"),
 
   80     EV(GLOBAL, FW_NMI, 5, 
"Firmware Non-Maskable Interrupt"),
 
   81     EV(GLOBAL, FW_NON_FATAL, 6, 
"Firmware Non-Fatal Error"),
 
   82     EV(GLOBAL, FW_FATAL, 7, 
"Firmware Fatal Error"),
 
   83     EV(GLOBAL, TWI_MRPC_COMP, 8, 
"TWI MRPC Completion"),
 
   84     EV(GLOBAL, TWI_MRPC_COMP_ASYNC, 9, 
"TWI MRPC Async Completion"),
 
   85     EV(GLOBAL, CLI_MRPC_COMP, 10, 
"CLI MRPC Completion"),
 
   86     EV(GLOBAL, CLI_MRPC_COMP_ASYNC, 11, 
"CLI MRPC Async Completion"),
 
   87     EV(GLOBAL, GPIO_INT, 12, 
"GPIO Interrupt"),
 
   88     EV(GLOBAL, GFMS, 13, 
"Global Fabric Management Server Event"),
 
   89     EV(PART, PART_RESET, 0, 
"Partition Reset"),
 
   90     EV(PART, MRPC_COMP, 1, 
"MRPC Completion"),
 
   91     EV(PART, MRPC_COMP_ASYNC, 2, 
"MRPC Async Completion"),
 
   92     EV(PART, DYN_PART_BIND_COMP, 3,
 
   93        "Dynamic Partition Binding Completion"),
 
   94     EV(PFF, AER_IN_P2P, 0, 
"Advanced Error Reporting in P2P Port"),
 
   95     EV(PFF, AER_IN_VEP, 1, 
"Advanced Error Reporting in vEP"),
 
   96     EV(PFF, DPC, 2, 
"Downstream Port Containment Event"),
 
   97     EV(PFF, CTS, 3, 
"Completion Timeout Synthesis Event"),
 
   98     EV(PFF, UEC, 4, 
"Upstream Error Containment Event"),
 
   99     EV(PFF, HOTPLUG, 5, 
"Hotplug Event"),
 
  100     EV(PFF, IER, 6, 
"Internal Error Reporting Event"),
 
  101     EV(PFF, THRESH, 7, 
"Event Counter Threshold Reached"),
 
  102     EV(PFF, POWER_MGMT, 8, 
"Power Management Event"),
 
  103     EV(PFF, TLP_THROTTLING, 9, 
"TLP Throttling Event"),
 
  104     EV(PFF, FORCE_SPEED, 10, 
"Force Speed Error"),
 
  105     EV(PFF, CREDIT_TIMEOUT, 11, 
"Credit Timeout"),
 
  106     EV(PFF, LINK_STATE, 12, 
"Link State Change Event"),
 
  109 #define EVBIT(t, n, b)[b] = SWITCHTEC_ ## t ## _EVT_ ## n 
  112     EVBIT(GLOBAL, STACK_ERROR, 0),
 
  113     EVBIT(GLOBAL, PPU_ERROR, 1),
 
  114     EVBIT(GLOBAL, ISP_ERROR, 2),
 
  115     EVBIT(GLOBAL, SYS_RESET, 3),
 
  116     EVBIT(GLOBAL, FW_EXC, 4),
 
  117     EVBIT(GLOBAL, FW_NMI, 5),
 
  118     EVBIT(GLOBAL, FW_NON_FATAL, 6),
 
  119     EVBIT(GLOBAL, FW_FATAL, 7),
 
  120     EVBIT(GLOBAL, TWI_MRPC_COMP, 8),
 
  121     EVBIT(GLOBAL, TWI_MRPC_COMP_ASYNC, 9),
 
  122     EVBIT(GLOBAL, CLI_MRPC_COMP, 10),
 
  123     EVBIT(GLOBAL, CLI_MRPC_COMP_ASYNC, 11),
 
  124     EVBIT(GLOBAL, GPIO_INT, 12),
 
  129     EVBIT(PART, PART_RESET, 0),
 
  130     EVBIT(PART, MRPC_COMP, 1),
 
  131     EVBIT(PART, MRPC_COMP_ASYNC, 2),
 
  132     EVBIT(PART, DYN_PART_BIND_COMP, 3),
 
  137     EVBIT(PFF, AER_IN_P2P, 0),
 
  138     EVBIT(PFF, AER_IN_VEP, 1),
 
  142     EVBIT(PFF, HOTPLUG, 5),
 
  144     EVBIT(PFF, THRESH, 7),
 
  145     EVBIT(PFF, POWER_MGMT, 8),
 
  146     EVBIT(PFF, TLP_THROTTLING, 9),
 
  147     EVBIT(PFF, FORCE_SPEED, 10),
 
  148     EVBIT(PFF, CREDIT_TIMEOUT, 11),
 
  149     EVBIT(PFF, LINK_STATE, 12),
 
  156     for (i = 0; i < ARRAY_SIZE(sum->
part); i++)
 
  164     for (i = 0; i < ARRAY_SIZE(sum->
pff); i++)
 
  179     uint64_t bit = events[e].summary_bit;
 
  181     switch (events[e].type) {
 
  186         if (index == SWITCHTEC_EVT_IDX_LOCAL) {
 
  188         } 
else if (index == SWITCHTEC_EVT_IDX_ALL) {
 
  189             set_all_parts(sum, bit);
 
  190         } 
else if (index < 0 || index >= ARRAY_SIZE(sum->
part)) {
 
  194             sum->
part[index] |= bit;
 
  198         if (index == SWITCHTEC_EVT_IDX_ALL) {
 
  199             set_all_pffs(sum, bit);
 
  200         } 
else if (index < 0 || index >= ARRAY_SIZE(sum->
pff)) {
 
  204             sum->
pff[index] |= bit;
 
  223     uint64_t bit = events[e].summary_bit;
 
  225     switch (events[e].type) {
 
  229         return sum->
part[index] & bit;
 
  231         return sum->
pff[index] & bit;
 
  259     bit = ffs(sum->
global) - 1;
 
  261         *e = global_event_bits[bit];
 
  262         sum->
global &= ~(1 << bit);
 
  266     for (*idx = 0; *idx < ARRAY_SIZE(sum->
part); (*idx)++) {
 
  267         bit = ffs(sum->
part[*idx]) - 1;
 
  271         *e = part_event_bits[bit];
 
  272         sum->
part[*idx] &= ~(1 << bit);
 
  276     for (*idx = 0; *idx < ARRAY_SIZE(sum->
pff); (*idx)++) {
 
  277         bit = ffs(sum->
pff[*idx]) - 1;
 
  281         *e = pff_event_bits[bit];
 
  282         sum->
pff[*idx] &= ~(1 << bit);
 
  324     for (i = 0; i < SWITCHTEC_MAX_PARTS; i++)
 
  328     for (i = 0; i < SWITCHTEC_MAX_PFF_CSR; i++)
 
  329         if (chk->
pff[i] & res->
pff[i])
 
  347     if (e <= SWITCHTEC_EVT_INVALID || e >= SWITCHTEC_MAX_EVENTS)
 
  351         *name = events[e].short_name;
 
  354         *desc = events[e].desc;
 
  356     return events[e].type;
 
  375     long long start, now;
 
  379     if (dev->ops->event_wait_for)
 
  380         return dev->ops->event_wait_for(dev, e, index, res, timeout_ms);
 
  387                   SWITCHTEC_EVT_FLAG_CLEAR |
 
  388                   SWITCHTEC_EVT_FLAG_EN_POLL,
 
  393     ret = gettimeofday(&tv, NULL);
 
  397     now = start = ((tv.tv_sec) * 1000 + tv.tv_usec / 1000);
 
  401                        now - start + timeout_ms : -1);
 
  416         ret = gettimeofday(&tv, NULL);
 
  420         now = ((tv.tv_sec) * 1000 + tv.tv_usec / 1000);
 
  422         if (timeout_ms > 0 && now - start >= timeout_ms) {