2. Release Notes

2.1. Smart HLS EAP 2021.1.2 Release Notes

Release date: June 14, 2021

2.1.1. LegUp HLS is now rebranded to Smart HLS

To port your existing LegUp HLS projects to Smart HLS, the following changes will be needed in the source code:

  • The include path of HLS library: change #include "legup/..." to #include "hls/..."

  • All legup namespace is renamed to hls; e.g., using namespace hls; or hls::FIFO

  • #pragma LEGUP ... should be changed to #pragma HLS ...

2.1.2. Software Features and Enhancements

  • Extended AXI4 master interface with AxSIZE and AxBURST support.

  • Improved FIFO depth modeling in software, and full-ness detection in software and RTL simulation.

  • Enhanced bit-width reduction to support very wide integer types (e.g., ap_uint<1024>).

  • Added support for unpartitioned structs (and nested structs) in CoSimulation.

2.1.3. Resolved Issues

The following defects and enhancement requests were resolved:

  • HLS-282: Rename “LegUp HLS” to “Smart HLS”

  • HLS-335: AP width memory controller gets “Warning: Invalid bitwidth ‘256’ for instr.”

  • HLS-330: VectorBlox design not finish when in multithreading with axi_read loops unmerged

  • HLS-328: Loop pipeline fails with ap_int type induction variable

  • HLS-327: Fix bug in software emulation of certain ap_int wide multiply operations

  • HLS-324: Legality check and error message about the one-to-one connection between FIFO and function’s FIFO argument

  • HLS-303: If Conversion Pass - DFS never exits with a >40,000 basic block size loop

  • HLS-296: If conversion pass errored out while trying to pipeline a loop

  • HLS-260: Segfault due to struct of ap_int top-level argument

  • HLS-158: Crashes at visitLocalMemoryInst – a struct argument containing ap_uint

  • HLS-147: Incorrect Transformation by if-conv

  • HLS-112: Add volatile support in extractArgs/cosim for parsing debug info for volatile

2.2. LegUp HLS EAP 2021.1 Release Notes

Release date: April 23, 2021

2.2.1. Software Features and Enhancements

  • Full support for complex software testbenches.

  • Automatically trigger re-compilation if needed to generate the software binary or Verilog when the C++ source code, Makefile, or TCL config files changed.

  • Added limited SW/HW Co-Simulation support for multi-threading when all threads are joined in the function where the threads are forked.

  • Added support for user-specified arguments of the main() function in software testbench.

  • Added AP_RND_ZERO quantization mode to the ap_fixpt C++ library.

  • Added a range() method to ap_int and ap_fixpt C++ libraries.

  • Added a simulation with waves feature to LegUp IDE for custom testbench.

2.2.2. Resolved Issues

The following defects and enhancement requests were resolved:

  • HLS-59: RTL Interface: fix memory port names

  • HLS-174: Spaces in LegUp workspace path makes synthesis fail. Add user error message to avoid spaces.

  • HLS-177: Change the header files on Windows

  • HLS-199: Add documentation comment to LegUp Library classes like ap_int similar to ap_fixpt so the user can mouse over the type in Eclipse and get the usage information

  • HLS-225: create_hdl_plus.tcl does not properly import mem_init files

  • HLS-232: Update windows installer link to LegUp getting started guide

  • HLS-255: After project import LegUp IDE does not save HLS constraints changes when closing

  • HLS-269: Missing legup_array_depth=1 for struct pass-in-by-reference

  • HLS-277: Automatically add array-depth attribute to pass-in-by-value structs.

  • HLS-278: Hardware functions are incorrectly removed by PreprocessThreadLib pass

  • HLS-279: Interface Report: Struct type IORam is incorrectly considered as scalar memory

  • HLS-280: Interface Report: byte-enable signal is not properly recognized for non-struct yet byte-enabled RAMs

2.3. LegUp HLS EAP 9.2.1 Release Notes

Release date: March 3, 2021

2.3.1. Software Features and Enhancements

2.3.2. Resolved Issues

The following defects and enhancement requests were resolved:

  • HLS-42: Libero 12.6 complains about set_option -rom_map_logic.

  • HLS-50: Sobel tutorial part 3 to match the syntax as part 1 & 2.

  • HLS-59: Fix the memory port names to a more understandable convention.

  • HLS-60: Give a proper error when there are multiple top-level functions specified.

  • HLS-63: Sefault if the top-level function pragma is removed from Sobel tutorial part 1.

  • HLS-78: Loop pipeline support for variable loop bounds.

  • HLS-97: Fmax improvements for customer design.

  • HLS-121: Cannot access AXI4 slave without starting the accelerator (in concurrent_access mode).

  • HLS-129: Loop unrolling crashes some designs.

  • HLS-142: Running Libero synthesis, P&R from LegUp will fail with Libero 12.5 or before on Windows.

  • HLS-149: LLVM’s loop-unswitch performs an unwanted loop replication.

  • HLS-156: CoSim: wrong values for ap_uint type being fed to the DUT.

  • HLS-162: Verilog name conflict in generated Verilog between a RAM instance and a register.

  • HLS-164: Cannot expand grouped AXI4stream ports in SmartDesign for HDL+ block.

  • HLS-165: Some memory interfaces are not showing in the interface report.

  • HLS-168: Clang errors out with none type memory partition pragma.

  • HLS-200: Can’t set multiply latency when split mult is enabled.

  • HLS-201: Execute create_hdl_plus.tcl from Libero got LEGUP_ROOT_DIR not set error.

  • HLS-203: ScheduleViewer does not work when LegUp installation and workspace are in different drives.

  • HLS-206: Red-line in Eclipse complaining about legup::thread/ref.

2.4. LegUp HLS EAP 9.1 Release Notes

Release date: Jan 4, 2021

2.4.1. Software Features and Enhancements

2.4.2. Resolved Issues

The following defects and enhancement requests were resolved:

  • Synthesize with Libero block flow to avoid limited number of top-level I/O pins

  • Fixes for RAM initialization and reset logic

  • Fix LegUp IDE cancel button on Windows

  • Fix Libero FMax parsing

  • Better error messages for unsupported C++ features (vector, map, etc.) and unsupported co-simulation cases